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| 74ABT125 Quad Buffer with 3-STATE Outputs March 1994 Revised November 1999 74ABT125 Quad Buffer with 3-STATE Outputs General Description The ABT125 contains four independent non-inverting buffers with 3-STATE outputs. Features s Non-inverting buffers s Output sink capability of 64 mA, source capability of 32 mA s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability s Disable time less than enable time to avoid bus contention Ordering Code: Order Number 74ABT125CSC 74ABT125CSJ 74ABT125CMTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Connection Diagram Pin Descriptions Pin Names An , Bn On Descriptions Inputs Outputs Function Table Inputs An L L H H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial Output Bn L H X On L H Z (c) 1999 Fairchild Semiconductor Corporation DS011667 www.fairchildsemi.com 74ABT125 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State Current Applied to Output in LOW State (Max) DC Latchup Source Current (Across Comm Operating Range) Over Voltage Latchup (I/O) -300 mA 10V twice the rated IOL (mA) -0.5V to 5.5V -0.5V to VCC -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA -65C to +150C -55C to +125C -55C to +150C Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate (V/t) Data Input Enable Input 50 mV/ns 20 mV/ns -40C to +85C +4.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ ICCT Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test Output Leakage Current Output Leakage Current Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 10 -10 -275 50 100 50 15 50 Outputs Enabled Outputs 3-STATE Outputs 3-STATE ICCD Dynamic ICC (Note 3) No Load 0.1 1.5 1.5 50 2.5 2.0 0.55 1 1 7 -1 -1 0.8 -1.2 Min Typ Max Units V V V V V V A A A V A A mA A A A mA A mA mA A mA/ MHz Max Max Min Min Min Min Max Max Max 0.0 0-5.5V 0-5.5V Max Max 0.0 Max Max Max VCC Conditions Recognized HIGH Signal Recognized LOW Signal IIN = -18 mA IOH = -3 mA IOH = -32 mA IOL = 64 mA VIN = 2.7V (Note 3) VIN = VCC VIN = 7.0V VIN = 0.5V (Note 3) VIN = 0.0V IID = 1.9 A, All Other Pin Grounded VOUT = 2.7V; OEn = 2.0V VOUT = 0.5V; OEn = 2.0V VOUT = 0.0V VOUT = VCC VOUT = 5.5V; All Others GND All Outputs HIGH All Outputs LOW OE n = VCC; All Others at V CC or Ground Additional ICC /Input VI = V CC - 2.1V Enable Input VI = VCC - 2.1V Data Input V I = VCC - 2.1V All Others at V CC or Ground Outputs Open OE n = GND, (Note 4) One Bit Toggling, 50% Duty Cycle Note 3: Guaranteed, but not tested. Note 4: For 8 bits toggling, ICCD < 0.8 mA/MHz. www.fairchildsemi.com 2 74ABT125 AC Electrical Characteristics TA = +25C Symbol Parameter Min tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Data to Outputs Output Enable Time Output Disable Time 1.0 1.0 1.0 1.0 1.0 1.0 VCC = +5V CL = 50 pF Typ Max 4.6 4.9 5.1 6.8 6.2 5.5 1.0 1.0 1.0 1.0 1.0 1.0 TA = -40C to +85C VCC = 4.5V-5.5V CL = 50 pF Min Max 4.6 4.9 5.1 6.8 6.2 5.5 ns ns ns Units Capacitance Symbol CIN COUT (Note 5) Parameter Input Capacitance Output Capacitance Typ 5.0 9.0 Units pF pF V CC = 0V V CC = 5.0V Conditions TA = 25C Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 3 www.fairchildsemi.com 74ABT125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Body Package Number M14A www.fairchildsemi.com 4 74ABT125 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74ABT125 Quad Buffer with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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